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(R)
VN771P
QUAD SMART POWER SOLID STATE RELAY FOR COMPLETE H BRIDGE CONFIGURATIONS
T YPE VN771P
R DS( on) * 0.135
I OUT 14 A
V CC 26 V
* Total resistance of one side in bridge configuration
s s s
s s s s s s
SUITED AS LOW VOLTAGE BRIDGE LINEAR CURRENT LIMITATION VERY LOW STAND-BY POWER DISSIPATION SHORT CIRCUIT PROTECTED STATUS FLAG DIAGNOSTICS OPEN DRAIN DIAGNOSTICS OUTPUT INTEGRATED CLAMPING CIRCUITS UNDER-VOLTAGE PROTECTION ESD PROTECTION
SO-28
DESCRIPTION The VN771P is a device formed by three monolithic chips housed in a standard SO28 package: a double high side and two low side switches. Both the double high side and low side switches are made using STMicroelectronics VIPower technology. This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application. The dual high side switches have built-in thermal shut-down to protect the chip from over temperature and short circuit, status output to provide indication for open load in off and on state, overtemperature conditions and stuck-on to VCC. The low side switches are two OMNIFET types (fully autoprotected Power MOSFET in VIPowerTM technology). They have built-in thermal shut-down, linear current limitation and overvoltage clamping. Fault feedback for thermal intervention can be detected by monitoring the voltage at the input pin. DUAL HIGH-SIDE SWITCH From the falling edge of the input signal, the status output, initially low to signal a fault condition (overtemperature or open load on-state), will go back to a high state with a different delay in case of overtemperature (tpovl) and in case of open open load (tpol) respectively. This feature allows to discriminate the nature of the detected fault. To protect the device against
September 1998
short circuit and over current condition, the thermal protection turns the integrated Power MOS off at a minimum junction temperature of 140 oC. When this temperature returns to 125 oC the switch is automatically turned on again. In short circuit the protection reacts with virtually no delay, the sensor (one for each channel) being located inside each of the two Power MOS areas. This positioning allows the device to operate with one channel in automatic thermal cycling and the other one on a normal load. An internal function of the devices ensures the fast demagnetization of inductive loads with a typical voltage (Vdemag) of -18V. This function allows to greatly reduces the power dissipation according to the formula: Pdem = 0.5 * Lload * (Iload)2 * [(VCC+Vdemag)/Vdemag] * f where f = switching frequency and Vdemag = demagnetization voltage. In this device if the GND pin is disconnected, with VCC not exceeding 16V, both channel will switch off. LOW-SIDE SWITCHES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user's standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry.
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BLOCK DIAGRAM
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CONNECTION DIAGRAM
PIN FUNCTION
No 1, 3, 25, 28 2 4, 11 5, 10, 19, 24 6 7 8 9 12, 14, 15, 18 13 16, 17 20, 21 22, 23 26, 27 NAME DRAIN 3 INPUT 3 N.C. V CC GND INPUT 1 FUNCT ION Drain of Switch 3 (low-side switch) Input of Switch 3 (low-side switch) Not Connected Drain of Switches 1and 2 (high-side switches) and Power Supply Voltage Ground of Switches 1 and 2 (high-side switches) Input of Switch 1 (high-side switch)
DIAG NO STIC Diagnostic of Switc hes 1 and 2 (high-side switches) INPUT 2 DRAIN 4 INPUT 4 SO URCE 4 SO URCE 2 SO URCE 1 SO URCE 3 Input of Switch 2 (high-side switch) Drain of Switch 4 (low-side switch) Input of Switch 4 (low-side switch) Source of Switch 4 (low-side switch) Source of Switch 2 (high-side switch) Source of Switch 1 (high-side switch) Source of Switch 3 (low-side switch)
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PROTECTION CIRCUITS DUAL HIGH SIDE SWITCH The simplest way to protect the device against a continuous reverse battery voltage (-26V) is to insert a a small resistor between pin 2 (GND) and ground. The suggested resistance value is about 150. In any case the maximum voltage drop on this resistor should not overcome 0.5V. If there is no need for the control unit to handle external analog signals referred to the power GND, the best approach is to connect the reference potential of the control unit to the device ground (see application circuit in fig. 3), which becomes the common signal GND for the whole control board avoiding shift of Vih, Vil and Vstat. LOW SIDE SWITCHES The devices integrate: inductive loads.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150oC. The device is automatically restarted when the chip temperature falls below 135oC.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of these devices are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)).
- OVERVOLTAGE
CLAMP PROTECTION: internally set at 42V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving
TRUTH TABLE (for Dual high-side switch only)
INPUT 1 Normal Operation L H L H X INPUT 2 L H H L X X H X L H L X L H L SO URCE 1 SOURCE 2 DIAG NO STIC L H L H L L X H L X L H H X L L H H L L X L X L H L X L H H H H H H H L L L L L L L L L L
Under-voltage T hermal Shutdown
O pen Load
Channel 1 Channel 2 Channel 1 Channel 2
H X H L X L H L X L
O utput Shorted to V CC
Channel 1 Channel 2
NOTE: The low-side switches have the fault feedback which can be detected by monitoring the voltage at the input pins. L = Logic LOW, H = Logic HIGH, X = Don't care
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ABSOLUTE MAXIMUM RATING (-40 oC < T j < 150 oC) HIGH SIDE SWITCH
Symbol V (BR)DSS I OUT IR II N -V CC I STAT V ESD P tot Tj T s tg Parameter Drain-Source Breakdown Voltage Output Current (cont.) Reverse Output Current Input Current Reverse Supply Voltage St atus Current Electrostatic Discharge (C = 100 pF, R =1.5 K) Power Dissipation at Tc = 25 C Junction Operating Temperature St orage Temperature
o
Value 40 14 -14 10 -4 10 2000 Internally Limited -40 to 150 -55 to 150
Uni t V A A mA V mA V W
o o
C C
LOW SIDE SWITCH
Symbol V (BR)DSS V IN ID IR V ESD P t ot Tj T stg Parameter Drain-Source Breakdown Voltage Input Voltage Drain Current Reverse DC Output Current Electrostatic Discharge (C = 100 pF, R =1.5 K) Total Dissipation at T c = 25 C Operating Junction Temperature Storage Temperature
o
Value Internally Clamped 18 Internally Limited -28 2000 Internally Limited Internally Limited -55 to 150
Unit V V A A V W
o o
C C
THERMAL DATA
R t hj-ca se R t hj-ca se R t hj-amb Thermal Resistance Junction-case (High-side switch) Thermal Resistance Junction-case (Low-side switch) Thermal Resistance Junction-ambient Max Max Max 20 20 60
o o
C/W C/W o C/W
ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (8 < VCC < 16 V; -40 Tj 125 oC unless otherwise specified) POWER
Symbol V CC In(*) Ro n IS V DS(MAX) Ri Parameter Supply Voltage Nominal Current On State Resistance Supply Current Tc = 85 C V DS(on) 0.5 V CC = 13 V IOUT = I n VCC = 13 V Of f State
o o o o
Test Co nditio ns
Min. 6 3.4 0.065
Typ . 13
Max. 26 5.2 0.1
Unit V A A V K
Tj = 25 C V CC = 13 V V CC = 13 V
Tj = 25 oC T j = 85 C
35 1.2 5 10
100 2 20
Maximum Voltage Drop IOUT = 13 A Output to GND internal Im pedance Tj = 25 C
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ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (continued) SWITCHING
Symbol t d(on)(^) t r (^) t d(o ff)(^) t f (^) (di/dt) on (di/dt) o ff Parameter Turn-on Delay Time O f Output Current Rise Time O f Output Current Turn-off Delay Time O f Output Current Fall Time Of O utput Current Turn-on Current Slope Turn-off Current Slope Test Co nditio ns R out = 2.7 R out = 2.7 R out = 2.7 R out = 2.7 R out = 2.7 R out = 2.7 Min. 5 28 10 28 0.003 0.005 Typ . 35 110 140 75 Max. 200 360 500 360 0.1 0.1 Unit s s s s A/s A/s
LOGIC INPUT
Symbol VI L V IH V I(hys t.) II N V ICL Parameter Input Low Level Voltage Input High Level Voltage Input Hysteresis Voltage Input Current Input Clamp Voltage VI N = 5 V Tj = 25 C 5
o
Test Co nditio ns
Min.
Typ .
Max. 1.5
Unit V V V A V V
3.5 0.2 0.9 30 6 -0.7
(*) 1.5 100 7
IIN = 10 mA IIN = -10 mA
PROTECTION AND DIAGNOSTICS
Symbol V STAT VUSD V SCL T TSD T SD( hys t.) TR V OL IOL Parameter St atus Voltage O utput Low Under Voltage Shut Down St atus Clamp Voltage Thermal Shut-down Temperature Thermal Shut-down Hysteresis Reset T emperature Open Voltage Level Open Load Current Level Of f-State (note 2) On-State 125 2.5 0.6 4 0.9 5 1.4 IST AT = 10 mA IST AT = -10 mA Test Co nditio ns IST AT = 1.6 mA 3.5 5 140 4.5 6 -0.7 160 Min. Typ . Max. 0.4 6 7 180 50 Unit V V V V
o
C C C
o
o
V A
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ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (continued) PROTECTION AND DIAGNOSTICS
Symbol t povl t pol Parameter St atus Delay St atus Delay (note 3) (note 3) 50 Test Co nditio ns Min. Typ . 5 500 Max. 10 2500 Unit s s
(*) In= Nominal current according to ISO definition for high side automotive switch (see note 1) (^) See switching time waveform () The VIH is internally clamped at 6V about. It is possible to connect this pin to an higher voltage via an external resistor calculated to not exceed 10 mA at the input pin. note 1: The Nominal Current is the current at Tc = 85 oC for battery voltage of 13V which produces a voltage drop of 0.5 V note 2: IOL(off) = (VCC -VOL)/ROL note 3: tpovl tpol: ISO definition
ELECTRICAL CHARACTERISTICS FOR LOW SIDE SWITCHES (Tcase = 25 oC unless otherwise specified) OFF
Symbol V CLAMP V CL TH V I NCL I DSS I I SS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input-Source Reverse Clamp Voltage Zero Input Voltage Drain Current (V in = 0) Supply Current from Input Pin ID = 10 A ID = 2 mA Iin = -1 mA VDS = 13 V VDS = 25 V VDS = 0 V V in = 0 V in = 0 Vi n = 10 V 250 Test Co nditio ns V in = 0 V in = 0 Min. 36 35 -1 -0.3 50 200 500 Typ . 42 Max. 48 Unit V V V A A A
ON ()
Symbol V IN(t h) R DS(on) Parameter Input T hreshold Voltage St atic Drain-source O n Resistance VDS = V in Vi n = 10 V Vi n = 5 V Test Co nditio ns ID + I in = 1 mA ID = 10 A ID = 10 A Min. 0.8 Typ . Max. 3 0.035 0.05 Unit V
DYNAMIC
Symbol g fs () C os s Parameter Forward Transconductance Output Capacitance Test Co nditio ns VDS = 13 V VDS = 13 V I D = 10 A f = 1 MHz V in = 0 Min. 14 Typ . 18 700 900 Max. Unit S pF
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ELECTRICAL CHARACTERISTICS FOR LOW SIDE SWITCHES (continued) SWITCHING (**)
Symbol t d(o n) tr t d(o ff ) tf t d(o n) tr t d(o ff ) tf (di/dt) on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Co nditio ns VDD = 15 V Vg en = 10 V (see figure 3) VDD = 15 V Vg en = 10 V (see figure 3) VDD = 15 V Vi n = 10 V VDD = 12 V Id = 10 A R gen = 10 Min. Typ . 100 330 400 155 450 1.7 7.5 3.4 35 60 Max. 200 600 700 300 700 3 10 5 Unit ns ns ns ns ns s s s A/s nC
Id = 10 A R gen = 1000
ID = 10 A R gen = 10 I D = 10 A V in = 10 V
SOURCE DRAIN DIODE
Symbol V SD () t rr () Q rr () I RRM () Parameter Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 10 A Test Co nditio ns V in = 0 180 0.45 7 Min. Typ . Max. 1.6 Unit V ns C A
ISD = 10 A di/dt = 100 A/s o Tj = 25 C VDD = 30 V (see test circuit, figure 5)
PROTECTION
Symbol T jsh () T jrs () I gf () I lim t dlim () E as () Parameter Ov ertemperature Shutdown Ov ertemperature Reset Fault Sink Current Drain Current Limit St ep Response Current Limit Single Pulse Avalance Energy Vi n = 10 V Vi n = 5 V Vi n = 10 V Vi n = 5 V Vi n = 10 V Vi n = 5 V st arting T j = 25 o C Vi n = 10 V V DD = 20 V R gen = 1K L = 10 mH 2.5 V DS = 13 V V DS = 13 V V DS = 13 V V DS = 13 V 20 20 Test Co nditio ns Min. 150 135 50 20 28 28 25 70 40 40 40 120 Typ . Max. Unit
o
C C
o
mA mA A A s s J
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % () Parameters guaranteed by design/characterization
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TYPICAL APPLICATION DIAGRAM
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SO-28 MECHANICAL DATA
mm MIN. A a1 b b1 C c1 D E e e3 F L S 7.40 0.40 17.7 10.00 1.27 16.51 7.60 1.27 8 (max.) 0.291 0.016 18.1 10.65 0.10 0.35 0.23 0.50 45 (typ.) 0.697 0.393 0.050 0.650 0.299 0.050 0.713 0.419 TYP. MAX. 2.65 0.30 0.49 0.32 0.004 0.013 0.009 0.020 MIN. inch TYP. MAX. 0.104 0.012 0.019 0.012
DIM.
0016572
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. .
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